FIG. 1 is a cross-sectional view of a semiconductor device. As shown in FIG. 1, the semiconductor device comprises active elements such as a MOS transistor 2, a wiring layer 3 formed of a conductor, a plug 5, and interlayer insulting film 4 formed on a semiconductor wafer 1.
FIG. 2 is a plan view showing the condition where a plurality of integrated circuits 6 having an identical circuit pattern (hereinafter referred to as chip) are formed on a single wafer 1. Such a wafer 1 is diced along the scribe line 7 provided between the chips 6 to thereby separate them into individual chips. At the side wall surface of each chip 6 separated by the dicing process, a cross-section of the interlayer insulating film 4, such as is shown in FIG. 1 is exposed. The interlayer insulating film 4 such as silicon oxide has the nature to absorb moisture from the atmosphere. If moisture from the external atmosphere enters the inside from the side wall surface of the chip 6, the problem arise that a wiring layer 3 and a plug formed of conductor are corroded and characteristics of the integrated circuit are thereby deteriorated.
The technology to surround the external circumference of chip 6 with a moisture-proof ring is known. Such a moisture-proof ring is continuously formed along the external circumference of the individual chips 6 in order to shield the path from which the moisture content may enter into the chip 6.
FIG. 3 is a partly enlarged plan view of a plurality of chips formed on a wafer. Each chip 6 comprises elements such as a MOS transistor, a region where an internal circuit 8 having a wiring layer is formed, and a moisture-proof ring 9 formed surrounding the internal circuit 8. A scribe line 7 is provided between chips 6.
FIG. 4 is a cross-sectional view along the line A-A′ in FIG. 3. On the surface of wafer 1 in the internal circuit 8 region, a MOS transistor 2 is formed. Also, in the region of the internal circuit 8, a multilayer wiring structure including the wiring layers L1 to L6 connected to the MOS transistor 2 and the plugs P1 to P6 connecting the wiring layers is formed. Between the wiring layers, the interlayer insulating layers D1 to D8 are formed. On the interlayer insulating film D8, a passivation film 20 is formed.
The moisture-proof ring 9 is constituted with a laminated layer of the moisture-proof ring conductor patterns LS1 to LS6 formed of a conductive layer identical to that of the wiring layers L1 to L6 and the moisture-proof ring conductor patterns PS1 to PS6.
The moisture-proof ring 9 has a layer structure identical to that of the multilayer wiring structure of the internal circuit 8 and may also be formed simultaneously with the internal circuit 8 using common processes in the art. In many cases, the moisture-proof ring is fixed to a predetermined potential such as ground potential.
Research has been conducted into a device constituted by joining a plurality of chips with wires on the wafer, in place of separating chips with the dicing process, utilizing a semiconductor process where a plurality of identical chips are formed.
FIGS. 5(A) and 5(B) are explanatory diagrams of the method to connect a plurality of chips by wires on a wafer. FIG. 5(A) is a reticle for manufacturing devices where every chip is to be individually diced. The reticle 10a includes the region where an internal circuit pattern 8 is formed and the region of a scribe line 7. A plurality of chips having an identical circuit pattern are formed on the wafer using the reticle 10a. The scribe line 7 is formed between the chips and each chip is separated by the dicing process.
FIG. 5(B) is a reticle for manufacturing a single device by connecting the adjacent chips with wires on the wafer. The structure of the internal circuit 8 is identical to that of the internal circuit 8 of the reticle shown in FIG. 5(A). In the region 8c provided at a part of the scribe line 7, the connecting wire is formed to connect the adjacent chips. The chip-to-chip connecting wires are formed simultaneously with the wiring of the internal circuit 8 by utilizing reticle 10b. In this case, the dicing is not performed along the scribe line 7 between chips.
In this specification, a device constituted by individually separating the chips is called a single-core device, while a device constituted by separating the chips in units comprising a plurality of chips is called a multi-core device.
In the course of business, a manufacturer of semiconductor devices is requested to manufacture single-core devices or multi-core devices in accordance with requirements from users. It is desirable for manufacturers to prepare reticle sets required in order to realize manufacture and supply of reticles within a short period of time even in the case where a single-core or multi-core device request maybe issued.
For manufacture of a single-core device, it is required to prepare a set of reticles including a moisture-proof ring pattern surrounding each chip. For example, in the case of a device having six-layers of wiring, about 15 reticles are required for the wiring process. Modifications are required for the structure of the moisture-proof ring of a multi-core device and a set of reticles which are different from those used for the single-core device must be prepared. About 15 reticles required for the wiring must be additionally prepared.
As such, a set of reticles required for manufacturing both the single-core device and the multi-core device are about 30 reticles in total, and the cost required for preparation of these reticles becomes very expensive.